Electrical Engineering

Architecture of FPGAs and CPLDs: A Tutorial

Abstract

This paper provides a tutorial survey of architectures of commercially available high-capacity

field-programmable devices (FPDs). We first define the relevant terminology in the field and then

describe the recent evolution of FPDs. The three main categories of FPDs are delineated: Simple

PLDs (SPLDs), Complex PLDs (CPLDs) and Field-Programmable Gate Arrays (FPGAs). We

then give details of the architectures of all of the most important commercially available chips,

and give examples of applications of each type of device.

1 Introduction to High-Capacity FPDs

Prompted by the development of new types of sophisticated field-programmable devices (FPDs),

the process of designing digital hardware has changed dramatically over the past few years.

Unlike previous generations of technology, in which board-level designs included large numbers

of SSI chips containing basic gates, virtually every digital design produced today consists mostly

of high-density devices. This applies not only to custom devices like processors and memory, but

also for logic circuits such as state machine controllers, counters, registers, and decoders. When

such circuits are destined for high-volume systems they have been integrated into high-density

gate arrays. However, gate array NRE costs often are too expensive and gate arrays take too long

to manufacture to be viable for prototyping or other low-volume scenarios. For these reasons,

most prototypes, and also many production designs are now built using FPDs. The most compelling

advantages of FPDs are instant manufacturing turnaround, low start-up costs, low financial

risk and (since programming is done by the end user) ease of design changes.

The